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您的检索式：作者名="Cor CLAEYS"
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| 1 | Editor's note显示文摘The dynamic range of the currently most widely used 24-bit seismic data acquisition devices is 10–20 d B lower than that of broadband seismometers, and this can affect the completeness of seismic waveform recordings under certain conditions. However, this problem is not easy to solve because of the lack of analog to digital converter(ADC) chips with more than 24 bits in the market. In this paper, we propose a method in which an adder, an integrator, a digital to analog converter chip, a field-programmable gate array, and an existing low-resolution ADC chip are used to build a third-order 16-bit oversampling delta-sigma modulator. This modulator is equipped with a digital decimation filter, thus facilitating higher resolution and larger dynamic range seismic data acquisition. Experimental results show that, within the 0.1–40 Hz frequency range, the circuit board's dynamic range reaches 158.2 d B, its resolution reaches 25.99 bits, and its linearity error is below 2.5 ppm, which is better than what is achieved by the commercial 24-bit ADC chips ADS1281 and CS5371. This demonstrates that the proposed method may alleviate or even completely resolve the amplitude-limitation problem that so commonly occurs with broadband observation instruments during strong earthquakes. | Ru HUANG Hiroshi IWAI Cor CLAEYS Simon DELEONIBUS Runsheng WANG | 2016 | Science China(Information Sciences)2016，59，6： | 1 |
| 2 | Silicon-film-related random telegraph noise in UTBOX silicon-on-insulator nMOSFETs显示文摘This paper studies the amplitude of random telegraph noise(RTN) caused by a single trap in the silicon film of ultra-thin buried oxide(UTBOX) silicon-on-insulator(SOI) devices. The film-defect-related RTN was identified and analyzed by low frequency noise measurement and time domain measurement. Emphasis is on the relative amplitude ΔID/ID, which is studied in the function of the front-gate, the back-gate and the drain-to-source biases. Interesting asymmetric or symmetric VDSdependence of switched source and drain are observed and supported by calibrated Sentaurus simulations. It is believed the asymmetry of the VDS dependence of the switched source and drain is related to the lateral trap position along the source and drain. | 方雯 Eddy Simoen Li Chikang Marc Aoulaiche 罗军 赵超 Cor Claeys | 2015 | Journal of Semiconductors2015，36，9： | 0 |
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