Variability in nanoscale CMOS technology

查看全文 作　　者：KUHN [1]Kelin

机构地区：[1]Portland Technology Development, Intel Corporation, Hillsboro, OR 97124, USA

出　　处：《Science China(Information Sciences)》索引2011年第54卷第5期,共10页

摘　　要：Moore's Law technology scaling has improved VLSI performance by five orders of magnitude in the last four decades. As advanced technologies continue the pursuit of Moore's Law, a variety of challenges will need to be overcome. One of these challenges is management of process variation. This paper discusses the importance of process variation in modern CMOS transistor technology, reviews front-end variation sources, presents device and circuit variation measurement techniques (including circuit and SRAM data from the 32 nm node), and compares recent intrinsic transistor variation performance from the literature. 关键词：CMOS技术 32纳米变异超大规模集成电路 CMOS工艺摩尔定律管理过程 SRAM

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Variability in nanoscale CMOS technology

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