THE DESIGN OF VMEBUS BRIDGE CONTROLLER WITH SHARC BUS

查看全文 作　　者：Wang Min Wu Shunjun Su [1]Tao 机构地区：[1]Key Lab for Radar Signal Processing, Xidian University, Xi'an 710071, China 出　　处：《Journal of Electronics(China)》索引2005年第22卷第6期,共8页 摘　　要：Targeting at the high expense and inflexibility to realize VMEbus bridge controller by professional Integrated Circuit (IC), this paper presents a scheme of adopting CPLD/FPGA (Complicated Programmable Logic Device/Field Programmable Gate Array) to design bridge controller between VMEbus and local bus. SHARC DSP (Digital Signal Processor) bus is an example. It has functions of nearly entire master/slave interface of VMEbus, and can act as DMA (Direct Memory Access) controller and perform block transfer in DMA or master processor initiative way without length limit. External circuit of the design is very simple. In comparison with special ICs, it has high performance to price ratio and can be easily applied to local buses of other processors with quite a little modification. 关 键 词：桥控制器 逻辑装置 可编程设计 数字信号处理 电路设计